The present disclosure relates generally to magnetic random access memory (MRAM) devices and, more specifically, to an MRAM cell having a write line of multiple thicknesses and/or widths.
Magnetic random access memory (MRAM) cells are often based on a magnetic tunnel junction (MTJ) cell comprising at least three basic layers: a “free” ferromagnetic layer, an insulating tunneling barrier, and a “pinned” ferromagnetic layer. In the free layer, magnetization moments are free to rotate under an external magnetic field, but the magnetic moments in the “pinned” layer are not. In order to sense states in the MTJ configuration, a constant current can be applied through the cell. As the magneto-resistance varies according to the state stored in the cell, the voltage can be sensed over the memory cell. To write or change the state in the memory cell, an external magnetic field can be applied that is sufficient to completely switch the direction of the magnetic moments of the free magnetic layers. In general, bit lines, word lines, control lines, program lines, and other write lines (herein collectively referred to as write lines) are employed to create the magnetic field during cell operation.
Write lines generally have substantially constant widths and thicknesses which are optimized according to desired performance characteristics. For example, an insufficient cross-sectional area of the write lines (the product of width and thickness) results in excessively high line resistance. However, an excessive cross-sectional area of the write lines can degrade magnetic flux efficiency, possibly due to low current density. Hence, in selecting a write line cross-sectional area, MRAM cell designers are faced with the dichotomy of high line resistance and degraded magnetic flux density.
Accordingly, what is needed is an MRAM device and method of manufacture thereof that addresses the issues discussed above.